How many calculations does a graphics card perform per second to draw a frame of Cyberpunk or train a network? The channel Branch Education took apart an RTX 3090 — literally — and reconstructed the die GA102 in 3D. This text follows the video How do Graphics Cards Work? Exploring GPU Architecture. The Blackwell generation is already out; the architecture lesson is the same.
The scale
Three anchors from the video:
- Super Mario 64 (1996): ~100 million calculations per second.
- Minecraft (2011): ~100 billion.
- RTX 3090: more than 36 TFLOPS. The 4090, mentioned in the same video, rises to 82,58 TFLOPS.
If each of the 8 billion humans performed one multiplication per second, it would take ~4.400 more Earths to match a high-end GPU. The silicon fits on a coin.
Both are processors. Their philosophies are opposites:
CPU — jato
poucos núcleos (8–24) | latência baixa | cache L2/L3 enorme
preditor de desvio | controle flexível | kernel, disco, rede
GPU — navio cargueiro
milhares de núcleos (10.496 na 3090) | vazão (throughput)
controle compartilhado | a mesma conta em milhões de dados
The CPU takes off and lands at thousands of airports: sequential, unpredictable tasks. The GPU carries tens of thousands of containers between two fixed ports: millions of vertices, pixels, or network weights undergoing the same operation. It is the same perspective as the post GPU vs TPU — here the zoom is on the consumer die, not the datacenter accelerator.
Inside GA102 (Ampere)
The 3090 uses the GA102: custom Samsung 8 nm, 28,3 billion transistors, 628 mm². Rigid hierarchy:
GA102
7 GPC (Graphics Processing Clusters)
12 SM por GPC → 84 SM no silício inteiro
4 partições / warp schedulers por SM
32 CUDA cores por partição (128 por SM)
1 Tensor Core por partição (4 por SM)
1 RT Core por SM
GA102 cheio: 10.752 CUDA | 336 Tensor | 84 RT
The 3080 / 3080 Ti / 3090 / 3090 Ti cards come from the same design. During photolithography, dust and wafer defects kill an SM. Instead of throwing away 628 mm², NVIDIA disables the block with a laser — binning:
- 3090 Ti: perfect silicon, 10.752 CUDA.
- 3090: 10.496 (2 SM off).
- 3080 Ti: 10.240 (4 SM off).
- 3080: 8.704 (16 SM off).
The CUDA core is an FMA
Each CUDA core has ~410 thousand transistors. The circuit that matters is the FMA (Fused Multiply-Add), one operation per clock cycle:
Resultado = A × B + C
It is the backbone of 3D graphics and AI — the same MAC of the neuron and Tensor Core / MXU. In Ampere, half the paths are FP32; the other half handles FP32 or INT32 in the same cycle. More expensive calculations (division, root, sine, cosine) fall to the SFU — only 4 per SM.
GDDR6X, PAM-4, and GDDR7's PAM-3
Thousands of cores without data sit idle. CPU RAM (DDR4/DDR5) runs on a 64-bit bus, around 50–80 GB/s. The 3090 carries 24 GB of GDDR6X (Micron) on a bus of 384 bits, ~936 GB/s (the video rounds it to 1 TB/s).
CPU + DDR5 GPU + GDDR6X
barramento 64-bit barramento 384-bit
~60 GB/s ~1 TB/s
caminhão de entrega porto de contêineres
Computers are not just 0 and 1 on the traces. To avoid doubling the clock (heat, noise):
- PAM-4 (GDDR6X): four voltage levels. Each symbol carries 2 bits (
00,01,10,11). - PAM-3 (GDDR7): three states (−1, 0, +1). Encodes 3 bits in 2 ternary digits — simpler decoder, greater noise tolerance, less power.
SIMD, the cowboy hat, and “embarrassingly parallel”
Drawing a 3D world is an embarrassingly parallelproblem: splitting it into thousands of independent pieces costs almost nothing. The hat in the video has ~14.000 vertices (X, Y, Z) and 28.000 triangles:
- Model space: vertices at the object's origin (0, 0, 0).
- World space: translation, rotation, scaling — each vertex × a 4×4 matrix.
- A scene with 5.000 objects and ~8 million vertices: the same instruction on millions of numbers. This is SIMD (Single Instruction, Multiple Data).
From SIMD to SIMT — and where “warp” came from
Until ~2016, the warp of 32 threads marched in lockstep, like a Greek phalanx. In modern SIMT, each thread has its own program counter and registers. An if/else that splits the warp in half (warp divergence) does not stall the entire SM: both paths run, then reconcile in the 128 KB L1 per SM.
The name warp did not come from Star Trek. It came from weaving: the Jacquard loom (1804) selected the warp threads (warp threads) in parallel, using punched cards.
The GigaThread Engine distributes thread blocks across free SMs. It is the dispatcher that makes 10 thousand cores look like a single program.
SHA-256, ASIC, and Tensor Core
The same machine serves more than gaming.
Bitcoin mining. Each SHA-256 attempt (different nonce) is independent of the previous one. The 3090 produced ~95 million hashes/s. A dedicated ASIC exceeds 250 trillion/s: spoon versus excavator. GPUs for Bitcoin are dead.
Tensor Cores and DLSS. Instead of scalar pairwise operations, the Tensor Core processes an entire matrix in mixed floating point in one instruction:
D = A × B + C
It is the foundation of neural networks and transformers on consumer silicon — the same MatMul that the post on GPU vs TPU places in the TPU's systolic MXU, and that the crash course on deep learning treats as the training calculation. On Linux, the practical shortcut for using that computation without buying a cluster is Ollama.
References
- Branch Education — How do Graphics Cards Work?
- GPU vs TPU: how AI chips work
- What is a neural network?
- Deep Learning for beginners
- Local AI on Linux with Ollama
A graphics card is not “thousands of little CPUs.” It is a port: mass FMA, memory far wider than CPU DDR, and a dispatcher (GigaThread) that only works while the problem splits itself. Branch Education showed the port from within. The rest — DLSS, LLM, dead mining — is the same ship with different cargo.